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ltc3527/ltc3527-1 1 35271fc typical application load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.01 1 100 10 1000 35271 ta01b 0 1000 0.1 100 10 1 0.01 0.1 burst efficiency fixed frequency power loss burst v in = 2.4v v out1 = 3.3v features applications description dual 800ma/400ma, 1.2mhz/2.2mhz synchronous step-up dc/dc converters the ltc ? 3527/ltc3527-1 are dual high ef? ciency, step-up dc/dc converters in a space saving 16-lead 3mm 3mm qfn package. battery life is maximized with a 700mv start- up voltage and operation down to 500mv once started. the shdn and pgood pins enable the converters to be sequenced or started together. the ltc3527/ltc3527-1 limit inrush current during start- up. selectable 1.2mhz or 2.2mhz operation provides a choice between the highest ef? ciency or smallest solu- tion footprint. the current mode pwm design is internally compensated reducing external parts count. burst mode operation or ? xed frequency operation is selectable via the mode pin. anti-ring circuitry reduces emi in discontinuous mode. this device also features thermal shutdown. true output disconnect allows the output to be completely open in shutdown. the ltc3527-1 actively discharges v out1 or v out2 when its respective shdn goes low. qui- escent current in shutdown is less than 2a. 1.2mhz ef? ciency and power loss n dual synchronous step-up dc/dc converters n delivers 3.3v at 200ma/100ma from one alkaline/ nimh cell, or 3.3v at 400ma/200ma from two cells n v in start-up voltage: 700mv n 0.5v to 5v v in range after start-up n 1.6v to 5.25v v out range n output disconnect in shutdown n v in > v out operation n 1.2mhz or 2.2mhz operation n up to 94% ef? ciency n 12a quiescent current in burst mode ? operation n inrush current limiting and soft-start n internal synchronous recti? ers n logic-controlled shutdown (< 2a) n quick v out discharge (ltc3527-1) n 16-lead, 0.75mm 3mm 3mm qfn package n mp3/personal media players n noise canceling /bluetooth headsets n wireless mice n portable medical instruments two-cell alkaline to 3.3v/1.8v synchronous boost converters 35271 ta01 + on off 4.7 f ltc3527 4.7 h 4.7 h 4.7 f 4.7 f 15pf 15pf 1.6v to 3.2v sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 shdn1 sw2 fb2 pgood2 shdn2 mode gnd f sel v out 3.3v 150ma v out 1.8v 150ma v in 1.78m 1m 619k 1.21m on off l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners.
ltc3527/ltc3527-1 2 35271fc electrical characteristics pin configuration absolute maximum ratings v in , v in1 , v in2 voltage ................................. C 0.3v to 6v sw1, sw2 voltage (dc) .............................. C 0.3v to 6v (pulsed < 100ns) ..................................... C 0.3v to 7v shdn1 , shdn2 , fb1, fb2 voltage ............... C 0.3v to 6v v out1 , v out2 ................................................ C 0.3v to 6v mode, fsel, pgood1, pgood2 ................. C 0.3v to 6v operating temperature (notes 2, 5) .........C40c to 85c junction temperature ........................................... 125c storage temperature range ...................C 65c to 125c (note 1) 16 17 pgnd 15 14 13 5 6 7 8 top view ud package 16-lead (3mm s 3mm) plastic qfn 9 10 11 12 4 3 2 1 shdn1 fb1 mode v in1 shdn 2 fb2 fsel v in2 pgood1 v in gnd pgood2 v out1 sw1 sw2 v out2 t jmax = 125c, ja = 68c/w exposed pad (pin 17) is pgnd, must be soldered to pcb parameter conditions min typ max units minimum start-up voltage i load = 1ma 0.7 0.88 v output voltage adjust range v out1 v out1 v out2 v out2 l l 1.7 1.6 1.7 1.6 5.25 5.25 5.25 5.25 v v v v line regulation v in = 1v to 5v 0.005 %/v feedback voltage fb1, fb2 l 1.176 1.20 1.224 v feedback input current fb1, fb2 v fb1,2 = 1.20v 1 50 na quiescent current: shutdown v shdn1 = v shdn2 = 0v, not including switch leakage, v out1 = v out2 = 0v 0.1 2 a quiescent current: burst mode operation measured on v out , v fb1 = v fb2 = 1.5v 12 a quiescent current: active v fb1 = v fb2 > 1.2v (note 3) 500 900 a nmos switch leakage current (ltc3527) v sw1,2 = 5v, shdn1,2 = 0v 0.1 10 a the l denotes the speci? cations which apply over the full operating temperature range, C40 c to 85 c. v in = v in1 = v in2 = 1.2v, v out1 = v out2 = 3.3v, t a = 25c, unless otherwise noted. order information lead free finish tape and reel part marking package description temperature range ltc3527eud#pbf ltc3527eud#trpbf lddk 16-lead (3mm 3mm) plastic qfn C40c to 85c ltc3527eud-1#pbf ltc3527eud-1#trpbf lcxp 16-lead (3mm 3mm) plastic qfn C40c to 85c lead based finish tape and reel part marking package description temperature range ltc3527eud ltc3527eud#tr lddk 16-lead (3mm 3mm) plastic qfn C40c to 85c ltc3527eud-1 ltc3527eud-1#tr lcxp 16-lead (3mm 3mm) plastic qfn C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
ltc3527/ltc3527-1 3 35271fc electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3527e/ltc3527e-1 are guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: current is measured into the v out pin since the supply current is bootstrapped to the output. the current will re? ect to the input supply by: (v out /v in ) ? (1/ef? ciency). all switches are off. the l denotes the speci? cations which apply over the full operating temperature range, C40 c to 85 c. v in = v in1 = v in2 = 1.2v, v out1 = v out2 = 3.3v, t a = 25c, unless otherwise noted. parameter conditions min typ max units pmos switch leakage current (ltc3527) v sw1,2 = 5v, v out1,2 = 0v, shdn1,2 = 0v 0.1 10 a nmos and pmos combined switch leakage current (ltc3527-1) v sw1,2 = 5v, v out1,2 = 0v, shdn1,2 = 0v (note 6) 0.2 20 a nmos switch on-resistance, sw1 0.30 nmos switch on-resistance, sw2 0.50 pmos switch on-resistance, sw1 0.40 pmos switch on-resistance, sw2 0.60 nmos current limit, sw1 l 800 ma nmos current limit, sw2 l 400 ma current limit delay to output time (note 4) 60 ns maximum duty cycle v fb1,2 = 1v l 85 90 % minimum duty cycle v fb1,2 = 1.3v l 0% switching frequency v fsel = 0v l 0.9 1.2 1.5 mhz switching frequency v fsel = 3.3v l 1.8 2.2 2.8 mhz shdn1,2 input high voltage 0.88 v shdn1,2 input low voltage 0.35 v shdn1,2 input current v shdn1,2 = 3.3v 1 2 a pgood1, pgood2 threshold referenced to the feedback voltage C6 C9 C14 % pgood1, pgood2 low voltage i pgood1,2 = 1ma 0.1 0.2 v pgood1, pgood2 leakage current v pgood1,2 = 5.25v 0.01 1 a mode input high voltage 1v mode input low voltage 0.35 v mode input current v mode = 3.3v 1 2 a fsel input high voltage 0.88 v fsel input low voltage 0.35 v fsel input current v fsel = 3.3v 1 2 a soft-start time 0.5 ms note 4: speci? cation is guaranteed by design and not 100% tested in production. note 5: the ltc3527/ltc3527-1 includes an overtemperature shutdown that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when the over- temperature shutdown is active. continuous operation above the speci? ed maximum junction temperature may impair device reliability. note 6: the nmos and pmos switch leakage currents are tested in parallel for the ltc3527-1 because v out1,2 are actively pulled to ground when shdn1,2 = 0v
ltc3527/ltc3527-1 4 35271fc typical performance characteristics ef? ciency vs load current and v in for v out1 = 1.8v at 1.2mhz ef? ciency vs load current and v in for v out2 = 1.8v at 1.2mhz ef? ciency vs load current and v in for v out1 = 3.3v at 1.2mhz ef? ciency vs load current and v in for v out1 = 3.3v at 2.2mhz ef? ciency vs load current and v in for v out2 = 3.3v at 1.2mhz ef? ciency vs load current and v in for v out2 = 3.3v at 2.2mhz ef? ciency vs load current and v in for v out1 = 5v at 1.2mhz ef? ciency vs load current and v in for v out2 = 5v at 1.2mhz 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g01 1v 1.5v 1.5v 1v burst fixed 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g02 1v 1.5v 1.5v 1v burst fixed 1.2v 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g03 3v 2.4v 1.8v burst fixed 2.4v 1.8v 3v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g04 3v 2.4v 1.8v burst fixed 2.4v 1.8v 3v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g05 3v 2.4v 1.8v burst fixed 1.8v 3v 2.4v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g06 3v 2.4v 1.8v burst fixed 1.8v 3v 2.4v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g07 4.2v 3.6v 2.4v burst fixed 2.4v 4.2v 3.6v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g08 4.2v 3.6v 2.4v burst fixed 2.4v 4.2v 3.6v (t a = 25c, unless otherwise noted)
ltc3527/ltc3527-1 5 35271fc v in (v) 0.5 i in (a) 4.5 1.5 2.5 3.5 1 2 3 4 35271 g09 0 20 60 80 100 180 40 120 140 160 v out = 5v 1.2mhz v out = 3.3v v out = 2.4v v out = 1.8v v in (v) 0.5 output current (ma) 4.5 1.5 2.5 3.5 1 2 3 4 35271 g10 v out = 5v v out = 3.3v v out = 2.5v v out = 1.8v 0 100 200 300 400 500 600 800 700 v in (v) 0.5 output current (ma) 4.5 1.5 2.5 3.5 1 2 3 4 35271 g11 v out = 5v v out = 3.3v v out = 2.5v v out = 1.8v 0 100 200 300 400 500 50 150 250 350 450 v in (v) 10 100 1000 0.735 load resistance () 0.635 0.935 0.685 0.785 0.835 0.885 35271 g12 converter 2 converter 1 temperature (c) C45 frequency (mhz) 2.00 75 1.50 1.00 C15 15 45 C30 90 0 30 60 2.50 35271 g16 fsel = 3.3v fsel = 0v v in = 1.2v v out = 3.3v typical performance characteristics no-load input current vs v in maximum output current vs v in for converter 1 maximum output current vs v in for converter 2 minimum load resistance during start-up vs v in burst mode threshold current vs v in for v out1 = v out2 = 1.8v burst mode threshold current vs v in for v out1 = v out2 = 3.3v burst mode threshold current vs v in for v out1 = v out2 = 5v oscillator frequency vs temperature (t a = 25c, unless otherwise noted) v in (v) 0.7 load current (ma) 8 10 12 1.3 35271 g13 6 4 0.9 1.1 1.5 1.2 0.8 1.0 1.4 2 0 14 2.2mhz operation converter 1 converter 2 leave burst enter burst v in (v) 0 load current (ma) 15 20 25 2.6 35271 g14 10 5 0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.8 3.0 2.2mhz operation converter 1 converter 2 enter burst leave burst v in (v) 1.0 40 50 70 2.5 3.5 35271 g15 30 20 1.5 2.0 3.0 4.0 4.5 10 0 60 load current (ma) 2.2mhz operation converter 1 converter 2 enter burst leave burst
ltc3527/ltc3527-1 6 35271fc temperature (c) C45 current limit (a) 0.90 1.00 1.10 75 0.80 0.70 0.50 C15 15 45 C30 90 0 30 60 0.60 1.30 1.20 35271 g17 converter1 converter2 v in = 1.2v v out = 3.3v temperature (c) C55 1.185 fb voltage (v) 1.190 1.205 1.200 1.195 C35 C15 5 25 45 65 85 105 125 35271 g18 temperature (c) 0.45 voltage (v) 0.50 0.55 0.60 0.65 0.75 C50 C30 10 C10 30 50 70 90 0.70 35271 g19 v out (v) 1.5 10 i q (a) 11 13 14 15 2.5 3.5 4 12 16 2 3 4.5 5 35271 g20 v in = 1.2v v out (v) 1.5 0.30 r ds(on) () 0.50 0.90 2.5 3.5 4 0.40 0.70 0.80 0.60 2 3 4.5 5 35271 g21 pmos2 nmos2 pmos1 nmos1 temperature (c) C45 r ds(on) () 0.50 0.60 75 0.40 0.30 C15 15 45 C30 90 0 30 60 0.70 35271 g22 pmos2 nmos2 pmos1 nmos1 500s/div sw1 pin 2v/div v out1 10mv/div ac-coupled 35271 g23 v in1 = 1.2v v out1 = 3.3v at 100ma c out1 = 10f 10s/div sw1 pin 2v/div inductor current 200ma/div v out1 50mv/div ac-coupled 35271 g24 v in1 = 1.2v v out1 = 3.3v c out1 = 10f typical performance characteristics start-up voltage vs temperature burst mode quiescent current vs v out r ds(on) (nmos and pmos) vs v out r ds(on) (nmos and pmos) change vs temperature fixed frequency switching waveform and v out ripple burst mode waveforms feedback voltage vs temperature current limit vs temperature (t a = 25c, unless otherwise noted)
ltc3527/ltc3527-1 7 35271fc typical performance characteristics v out1 load step response fixed frequency at 1.2mhz v out1 load step response burst mode operation at 1.2mhz v out2 load step response fixed frequency at 2.2mhz v out and i in during start-up 100s/div input current 200ma/div v out1 1v/div 35271 g25 v out1 = 3.3v c out1 = 10f shdn1 pin 1v/div 100s/div load current 50ma/div v out1 100mv/div ac-coupled 35271 g26 v in = 3.6v v out1 = 5v 50ma to 150ma step c out1 = 10f 100s/div load current 50ma/div v out1 100mv/div ac-coupled 35271 g27 v in = 3.6v v out1 = 5v 20ma to 170ma step c out1 = 10f 100s/div load current 50ma/div v out2 100mv/div ac-coupled 35271 g28 v in = 3.6v v out2 = 5v 50ma to 100ma step c out2 = 10f (t a = 25c, unless otherwise noted) v out1 = 5v load regulation v out2 = 3.3v load regulation i load1 (ma) 0 ?0.3. v out1 change (%) ?0.2 ?0.1 0 0.1 100 200 300 400 35271 g29 0.2 0.3 50 150 250 350 v in = 2.4v l = 3.3h mode = high i load2 (ma) 0 ?0.3. v out2 change (%) ?0.2 ?0.1 0 0.1 100 200 300 35271 g30 0.2 0.3 v in = 2.4v l = 3.3h mode = high
ltc3527/ltc3527-1 8 35271fc shdn1 (pin 1): boost converter 1 logic-controlled shutdown input. there is an internal 4m pull-down on this pin. ? shdn1 = high: normal free running operation, 1.2mhz/ 2.2mhz typical operating frequency. ? shdn1 = low: shutdown, quiescent current < 2a. note: both converters must be shut down together to achieve < 2a quiescent current. fb1 (pin 2): boost converter 1 feedback input to the g m error ampli? er. connect resistor divider tap to this pin. the output voltage can be adjusted from 1.6v to 5.25v by: vv r r see block diagram out1 120 1 1 2 =+ ? ? ? ? ? ? .? ( ) mode (pin 3): logic-controlled mode input for both boost converters. ? mode = high: fixed frequency operation ? mode = low: automatic burst mode operation mode pin must be 1v or greater to ensure ? xed frequency over all operating conditions. v out1 (pin 5): boost converter 1 output voltage sense input and drain of the internal synchronous recti? er mosfet. driver bias is derived from v out1 . pcb trace length from v out1 to the output ? lter capacitor(s) should be as short and wide as possible. sw1 (pin 6): boost converter 1 switch pin. connect the inductor between sw1 and v in1 . keep these pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. if the inductor current falls to zero or shdn1 is low, an internal 100 anti-ringing switch is connected from sw1 to v in1 to minimize emi. sw2 (pin 7): boost converter 2 switch pin. connect the inductor between sw2 and v in2 . keep these pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. if the inductor current falls to zero or shdn2 is low, an internal 100 anti-ringing switch is connected from sw2 to v in2 to minimize emi. v out2 (pin 8): boost converter 2 output voltage sense input and drain of the internal synchronous recti? er mosfet. driver bias is derived from v out2 . pcb trace length from v out2 to the output ? lter capacitor(s) should be as short and wide as possible. fsel (pin 10): logic-controlled frequency select input. ? fsel = high: 2.2mhz operation ? fsel = low: 1.2mhz operation fb2 (pin 11): boost converter 2 feedback input to the g m error ampli? er. connect resistor divider tap to this pin. the output voltage can be adjusted from 1.6v to 5.25v by: vv r r see block diagram out2 120 1 3 4 =+ ? ? ? ? ? ? .? ( ) shdn2 (pin 12): boost converter 2 logic-controlled shutdown input. there is an internal 4m pull-down on this pin. ? shdn2 = high: normal free-running operation, 1.2mhz/2.2mhz typical operating frequency. ? shdn2 = low: shutdown, quiescent current < 2a. note: both converters must be shut down together to achieve < 2a quiescent current. pgood2 (pin 13): boost converter 2 power good com- parator output. this open-drain output is low when v fb is 9% below its regulation voltage. gnd (pin 14): signal ground. this pin is used as a ground reference for the internal circuitry of the ltc3527/ ltc3527-1. v in , v in1 , v in2 (pins 15, 4, 9): battery input voltage. see operation section for more information. pgood1 (pin 16) boost converter 1 power good com- parator output. this open-drain output is low when v fb is 9% below its regulation voltage. pgnd (exposed pad pin 17): backplane. the exposed pad is pgnd and must be soldered to the pcb ground plane. it serves as the power ground connection for v out1 and v out2 , and as a means of conducting heat away from the package. pin functions
ltc3527/ltc3527-1 9 35271fc block diagram + C + C + + C + + + + 6 4 5 2 14 17 1 16 15 10 3 sw1 anti-ring pwm logic and drivers v c1 shutdown and v bias bulk control signals bulk control signals slope compensation slp1 mode control soft-start v c clamp oscillator start-up oscillator reference uvlo thermal sd shared converter 1 v in 0.88v to 5v sd1 burst 1 fb1 v ref_gd gnd exposed pad/ pgnd osc1 start1 sd1 v ref_gd tsd l1 4.7h v in v out v in v out v out1 1.6v to 5.25v c out1 4.7f r1 mode current sense 0.30 0.40 1.20v error amplifier fb1 pwm comp i lim ref 1.20v - 9% wake1 start1 start2 r2 v in1 pgood1 v in fsel mode shdn1 c in 4.7f sd1 i zero comp + C + C + + C 7 9 8 11 12 13 sw2 anti-ring pwm logic and drivers v c2 shutdown and v bias slope compensation slp2 mode control soft-start v c clamp converter 2 sd2 burst2 fb2 osc2 start2 sd2 v ref_gd tsd l2 4.7h v out2 1.6v to 5.25v v out1 v out2 c out2 4.7f r3 mode current sense 0.50 0.60 1.20v error amplifier fb2 pwm comp i lim ref 1.20v - 9% wake2 r4 v in2 pgood2 shdn2 sd2 i zero comp osc1 slp1 osc2 slp2 v ref_gd 1.20v 1.20v - 9% tsd C + C +
ltc3527/ltc3527-1 10 35271fc operation the ltc3527/ltc3527-1 are dual 1.2mhz/2.2mhz syn- chronous boost converters housed in a 16-lead 3mm 3mm qfn package. with the ability to start up and operate from inputs less than 880mv, these devices feature ? xed frequency, current mode pwm control for exceptional line and load regulation. the current mode architecture with adaptive slope compensation provides excellent transient load response, requiring minimal output ? ltering. internal soft-start and loop compensation simpli? es the design process while minimizing the number of external com- ponents. each converter has a separate input supply pin and is operated independently of the other, but they share the same oscillator thus providing in-phase switching. if different input supply voltages are used, the third v in pin must be wired to the higher of the two supplies and each v out must be higher than the highest v in . bypass capacitors are recommended on all v in pins. with low r ds(on) and low gate charge internal n-channel mosfet switches and p-channel mosfet synchronous recti? ers, the ltc3527/ltc3527-1 achieve high ef? ciency over a wide range of load current. with the mode pin low, automatic burst mode operation maintains high ef? ciency at very light loads, reducing the quiescent current to just 12a. if mode is high, ? xed frequency pwm switching provides low voltage ripple on the outputs. operation can be best understood by referring to the block diagram. a pgood signal is provided independently for each con- verter which can be used with the shdn pins to provide sequencing of the outputs. the ltc3527-1 provides an instant off feature which discharges v out1 or v out2 when their respective shdn pins go low. a frequency select function allows for 1.2mhz switching (fsel = low) or 2.2mhz switching (fsel = high). low voltage start-up the ltc3527/ltc3527-1 include an independent start-up oscillator designed to start up at an input voltage of 0.7v (typical). the two converters can be started together or in either sequence of boost 1 and boost 2 with appropri- ate control of shdn1 and shdn2 . soft-start and inrush current limiting are provided to each converter indepen- dently during start-up, as well as during normal mode. when v in , v out1 , or v out2 exceeds 1.4v (typical), the ic enters normal operating mode. once the higher of v out1 or v out2 exceeds v in by 0.24v, the ic powers itself from the higher v out instead of v in . at this point the internal circuitry has no dependency on the v in input voltage, eliminating the requirement for a large input capacitor. the input voltage can drop as low as 0.5v. with single-cell operation, the limiting factor for the ap- plication becomes the availability of the power source to supply suf? cient energy to the outputs at low voltages, and maximum duty cycle, which is clamped at 90% (typical). note that at low input voltages, small voltage drops due to the higher series resistance of a depleted cell become critical and greatly limit the power delivery capability of the converter. a higher value, low esr input capacitor can help to improve this to a small degree. low noise fixed frequency operation soft-start: the ltc3527/ltc3527-1 contain internal cir- cuitry to provide independent soft-start operation to each converter. the soft-start circuitry ramps the peak inductor current from zero to its peak value of 900ma (typical) for converter 1 or 500ma (typical) for converter 2 in ap- proximately 0.5ms, allowing start-up into heavy loads. the soft-start circuitry for both converters is reset in the event of a thermal shutdown or shutdown command. oscillator: an internal oscillator sets the switching fre- quency to 1.2mhz if the fsel pin is below 0.35v, or 2.2mhz if the fsel pin is above 0.88v. shutdown: shutdown is accomplished independently for each converter by pulling its respective shdn pin below 0.35v, and enabled by pulling each shdn pin above 0.88v. note that the shdn pins can be driven above v in or v out , as long as it is limited to less than the absolute maximum rating. error amplifier: the noninverting input of each transconductance error ampli? er is internally connected to the 1.20v reference. the inverting inputs are connected (refer to block diagram)
ltc3527/ltc3527-1 11 35271fc to fb1 for converter 1 and fb2 for converter 2. clamps limit the minimum and maximum error amp output volt- ages for improved large-signal transient response. power converter control loop compensation is provided internally. an external resistive voltage divider from v out1 (v out2 ) to ground programs the respective output voltage via fb1 (fb2) from 1.6v to 5.25v. vv r r vv r r out out 1 2 120 1 1 2 120 1 3 4 =+ ? ? ? ? ? ? =+ ? .? .? ? ? ? ? ? ? () see block diagram current sensing: lossless current sensing converts the peak current signal of each n-channel mosfet switch into a voltage which is summed with its corresponding internal slope compensation. the summed signals are compared to their respective error ampli? er outputs to provide individual peak current control commands for the pwm of each converter. current limit: the current limit comparators shut off the n-channel mosfet switches once their threshold is reached. each current limit comparator delay time to output is typically 60ns. peak switch current is limited to approximately 900ma for converter 1 and 500ma for converter 2, independent of input or output voltage. if v out1 or v out2 falls below 1v, its respective current limit is cut in half. zero current comparator: the zero current comparators monitor the inductor current to the outputs and shut off the synchronous recti? ers when the current reduces to ap- proximately 30ma. this prevents the inductor current from reversing in polarity, improving ef? ciency at light loads. synchronous recti? er: to control inrush current and to prevent the inductor currents from running away when v out1 or v out2 is close to v in , the p-channel mosfet synchronous recti? ers are only enabled when their respec- tive v out > (v in + 0.24v). anti-ringing control: the anti-ringing control connects a resistor across the inductor to prevent high frequency ring- ing on the sw1 (sw2) pins during discontinuous current mode operation. although the ringing of the resonant circuit formed by the inductors and c sw (capacitance on sw1 or sw2 pins) is low energy, it can cause emi radiation. output disconnect: the ltc3527/ltc3527-1 are designed to allow true output disconnect by eliminating body diode conduction of the internal p-channel mosfet recti? ers. this allows v out1 and v out2 to go to zero volts during shutdown, drawing no current from the input source. it also allows for inrush current limiting at turn-on, minimiz- ing surge currents seen by the input supply. note that to obtain the advantages of output disconnect, there must not be external schottky diodes connected between the sw1 (sw2) pins and v out1 (v out2 ). the output discon- nect feature also allows v out1 or v out2 to be pulled high, without any reverse current into a battery on v in . thermal shutdown: if the die temperature exceeds 160c, the device will go into thermal shutdown. all switches will be turned off and the soft-start capacitors will be discharged. the device will be enabled again when the die temperature drops by about 15c. burst mode operation to realize the ef? ciency bene? ts of burst mode operation, both v out1 and v out2 must be under a light load current condition, if they are both enabled. if one converter is shut down, then burst mode operation is enabled on the other converter. with the mode pin low, the ltc3527/ltc3527-1 will automatically enter burst mode operation at light load and return to ? xed frequency pwm mode when the load increases. refer to the typical performance characteristics to see the output load burst mode threshold current vs v in . the load current at which burst mode operation is entered can be changed by adjusting the inductor value. raising the inductor value will lower the load current at which burst mode is operation entered. in burst mode operation, the ltc3527/ltc3527-1 still switch at a ? xed frequency of 1.2mhz (fsel = 0) or 2.2mhz (fsel = 1), using the same error ampli? er and loop compen- sation for peak current mode control. this control method eliminates the output transient when switching between modes. in burst mode operation, energy is delivered to the operation
ltc3527/ltc3527-1 12 35271fc output until it reaches the nominal regulation value, then the ltc3527/ltc3527-1 transition to sleep mode where the outputs are off and the ltc3527/ltc3527-1 consume only 12a of quiescent current from the higher of v out1 or v out2 . when the output voltage droops slightly, switching resumes. this maximizes ef? ciency at very light loads by minimizing switching and quiescent current losses. burst mode output voltage ripple, which is typically 1% peak-to- peak, can be reduced by using more output capacitance (10f or greater), or with a small capacitor (15pf) con- nected between v out1 (v out2 ) and fb1 (fb2). if either load current increases, the ltc3527/ltc3527-1 will automatically leave burst mode operation. note that larger output capacitor values may cause this transition to occur at lighter loads. once the ltc3527/ltc3527-1 have left burst mode operation and returned to normal operation, they will remain there until both output loads are reduced below the burst threshold current. burst mode operation is inhibited during start-up and soft- start and until both v out1 and v out2 are at least 0.24v greater than v in if neither channel is in shutdown. when the mode pin is high, ltc3527/ltc3527-1 feature continuous pwm ? xed frequency operation at 1.2mhz (fsel = low) or 2.2mhz (fsel = high). at very light loads, the ltc3527/ltc3527-1 will exhibit pulse-skipping operation. single cell to 5v step-up applications due to the high inductor current slew rate in applica- tions boosting to 5v from a single-cell (alkaline, nicd or nimh), the ltc3527/ltc3527-1 may not enter burst mode operation at input voltages below 1.5v in a 2.2mhz application (fsel = high). for a single-cell to 5v appli- cation requiring burst mode 1.2mhz operation, (fsel = low) is recommended. refer to the typical performance characteristics for the burst mode thresholds for different input and output voltages. v in > v out operation the ltc3527/ltc3527-1 will maintain output voltage regulation even when the input voltage is above one or both of the desired output voltages. note, all v ins must be common to support this mode of operation. since this mode is less ef? cient and will dissipate more power in the ltc3527/ltc3527-1, the maximum output current capability is limited in order to maintain an acceptable junction temperature. when operating with v in > v out the power is de? ned by: pi v v out out in out =+ () ? ? ? ? ? 15 . to maintain a junction temperature below 125c, the fol- lowing formula must be adhered to: ()/ pp cw t out out a 12 68 125 +=? where t a is the ambient temperature. short-circuit protection the ltc3527/ltc3527-1 output disconnect feature allows an output short-circuit while maintaining a maximum in- ternally set current limit. the converters also incorporate internal features such as current limit foldback and thermal shutdown for protection from an excessive overload or short circuit. to reduce power dissipation under short- circuit conditions, the peak switch current limit is reduced to 500ma (typical) for converter 1 and 350ma (typical) for converter 2 when v out is less than 1v. schottky diode although it is not required, adding a schottky diode from sw1 (sw2) to v out1 (v out2 ) will improve ef? ciency by about 2%. note that this defeats the output disconnect and short-circuit protection features. operation applications information
ltc3527/ltc3527-1 13 35271fc 35271 f01 v in1 v in v in2 v out1 gnd gnd gnd gnd mode shdn1 shdn2 fsel v out2 applications information figure 1. recommended component placement for a dual-layer board pcb layout guidelines the high speed operation of the ltc3527/ltc3527-1 demands careful attention to board layout. a careless layout will result in reduced performance. figure 1 shows the recommended component placement. a large ground pin copper area will help to lower the die temperature. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. component selection inductor selection the ltc3527/ltc3527-1 can utilize small surface mount inductors due to their fast 1.2mhz/2.2mhz switching frequencies. inductor values between 3.3h and 4.7h are suitable for most 1.2mhz applications. inductor values between 1.5h and 2.2h are suitable for most 2.2mhz applications. larger values of inductance will allow slightly greater output current capability (and lower the burst mode threshold) by reducing the inductor ripple cur- rent. increasing the inductance above 10h will increase size while providing little improvement in output current capability. the minimum inductance value is given by: l vv v f ripple v in min out max in min ou > () ( ) () ?( ? ) ?? t tmax () where: ripple = allowable inductor current ripple (amps peak-to-peak) v in(min) = minimum input voltage v out(max) = maximum output voltage f = oscillator frequency (mhz) the inductor current ripple is typically set for 20% to 40% of the maximum inductor current. high frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving ef? ciency. the inductor should have low esr (series resistance of the windings) to reduce the i 2 r power losses, and must be able to support the peak inductor current without saturating. molded chokes and some chip inductors usually do not have enough core area to support the peak inductor currents of 900ma (500ma) seen on the ltc3527/ltc3527-1. to minimize radiated noise, use shielded inductors. see table 1 for suggested components and suppliers.
ltc3527/ltc3527-1 14 35271fc table 1. recommended inductors vendor part/style l ( h) maximum current (ma) dcr ( ) dimensions l w h (mm) coilcraft www.coilcraft.com mss5131 mss4020 me3220 2.2-10 3.3-10 1-10 1900-870 1100-540 3000-780 0.023-0.083 0.085-0.210 0.05-0.90 5.1 5.1 1 4 4 2 3.2 2.5 2 coiltronics www.cooperet.com sd10 sd12 1-10 1.2-10 1930-760 2450-818 0.045-0.289 0.037-0.284 5.2 5.2 1 5.2 5.2 1.2 fdk www.fdk.com mip3226d mipf2520d 1.5-6.8 1.5-4.7 1400-1000 1500-1000 0.07-0.12 0.07-0.11 3.2 2.6 1 2.5 2 1 murata www.murata.com lqh43c lqh32c 1-10 1-4.7 1080-650 800-650 0.08-0.24 0.09-0.15 4.5 3.2 2.6 3.2 2.5 2 sumida www.sumida.com cdrh3d16 cdrh2d14 4.7-15 4.7-12 900-450 680-420 0.11-0.29 0.12-0.32 3.8 3.8 1.8 3.2 3.2 1.5 tdk www.global.tdk.co.jp vlf3010a vlf5012a 1.5-10 2.2-10 1200-490 1500-800 0.068-0.58 0.090-0.30 2.6 2.8 1 4.5 4.7 1.2 taiyo yuden www.t-yuden.com nr3010 nr3015 4.7-15 4.7-15 750-400 1000-560 0.19-0.74 0.12-0.36 3 3 1 3 3 1.5 table 2. capacitor vendor information supplier phone website avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com taiyo-yuden (408) 573-4150 www.t-yuden.com tdk (847) 803-6100 www.component.tdk.com applications information output and input capacitor selection low esr (equivalent series resistance) capacitors should be used to minimize output voltage ripple. multilayer ceramic capacitors are an excellent choice as they have extremely low esr and are available in small footprints. a 4.7f to 10f output capacitor is suf? cient for most applications. larger values up to 22f may be used to obtain lower output voltage ripple and improve transient response. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. y5v types should not be used. the internal loop compensation of the ltc3527/ ltc3527-1 is designed to be stable with output capacitor values of 4.7f or greater. although ceramic capacitors are recommended, low esr tantalum capacitors may be used as well. a small ceramic capacitor in parallel with a larger tantalum capacitor may be used in demanding applications which have large load transients. another method of improv- ing the transient response is to add a small feedforward capacitor across the top resistor of the feedback divider [from v out1 (v out2 ) to fb1 (fb2)]. a typical value of 15pf will generally suf? ce. low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. it follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. a 2.2f input capacitor is suf? cient for most applications, although larger values may be used without limitations. table 2 shows a list of several ceramic capaci- tor manufacturers. consult the manufacturers directly for detailed information on their selection of ceramic parts.
ltc3527/ltc3527-1 15 35271fc load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta02b 1.5v 1.2v 1v burst fixed 1.2v 1v 1.5v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta02c 1v 1.5v 1.5v 1v burst fixed 1.2v 1.2v typical applications 1.2mhz, 1-cell to v out1 = 3v, v out2 = 1.8v boost 1 ef? ciency boost 2 ef? ciency 35271 ta02 + on off c in 4.7 f 4.7 h 4.7 h c out2 4.7 f c out1 4.7 f 15pf 15pf 0.85v to 1.60v l: sumida cdrh3d164r7 c in ,c out : taiyo yuden x5r jmk212bj475md sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 shdn1 ltc3527 sw2 fb2 pgood2 shdn2 mode gnd fsel single alkaline cell 1.84m 1.21m 612k 1.21m on off v out 3v 150ma v out 1.8v 150ma
ltc3527/ltc3527-1 16 35271fc 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta03b 1v 1.5v 1.5v 1v burst fixed 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta03c 1.5v 1.2v 1v burst fixed 1v 1.5v 1.2v typical applications 1.2mhz, 1-cell to v out1 = 1.8v, v out2 = 5v boost 1 ef? ciency boost 2 ef? ciency 35271 ta03 + on off c in 4.7 f 4.7 h10 h c out2 4.7 f c out1 4.7 f 0.85v to 1.60v l: sumida cdrh3d164r7 c in ,c out : taiyo yuden x5r jmk212bj475md sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 shdn1 sw2 fb2 pgood2 shdn2 mode gnd fsel single alkaline cell 612m 15pf 1.21m 3.24m 1.02m on off 15pf v out 1.8v 200ma v out 5v 50ma ltc3527
ltc3527/ltc3527-1 17 35271fc load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta04b 1.5v 1.2v 1v burst fixed 1.2v 1v 1.5v typical applications 2.2mhz, 1-cell to v out1 = 3.3v, v out2 = 1.8v boost 1 ef? ciency boost 2 ef? ciency 35271 ta04 + on off c in 4.7 f 2.2 h 2.2 h c out2 4.7 f c out1 4.7 f 0.85v to 1.60v l: sumida cdrh3d162r2 c in ,c out : taiyo yuden x5r jmk212bj475md sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 sw2 fb2 pgood2 mode gnd fsel single alkaline cell 1.78m 15pf 1m 612k 1.21m on off 15pf v out 3.3v 150ma v out 1.8v 150ma shdn1 shdn2 ltc3527 load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta04c 1.5v 1.2v 1v burst fixed 1.5v 1v 1.2v
ltc3527/ltc3527-1 18 35271fc typical applications 1.2mhz, 2-cell to v out1 = 5v, v out2 = 3.3v boost 1 ef? ciency boost 2 ef? ciency 35271 ta05 + + on off c in 4.7 f 10 h 4.7 h c out2 4.7 f c out1 4.7 f 15pf 15pf 1.8v to 3.2v l: sumida cdrh3d164r7 c in ,c out : taiyo yuden x5r jmk212bj475md sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 sw2 fb2 pgood2 mode gnd fsel alkaline cells 3.24m 1.02m 1.78m 1m on off v out 5v 300ma v out 3.3v 200ma shdn1 shdn2 ltc3527 load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta05b 3v 2.4v 1.8v burst fixed 1.8v 3v 2.4v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 g05 3v 2.4v burst fixed 1.8v 3v 2.4v 1.8v
ltc3527/ltc3527-1 19 35271fc sequenced start-up v out1 to v out2 1.2mhz, 1-cell to v out1 = 1.8v, v out2 = 3.3v boost 1 ef? ciency boost 2 ef? ciency 35271 ta06 + on off c in 4.7 f 4.7 h 4.7 h c out2 4.7 f c out1 4.7 f 0.85v to 1.60v l: sumida cdrh3d164r7 c in ,c out : taiyo yuden x5r jmk212bj475md sw1 v out1 v out2 v in1 v in v in2 fb1 pgood1 sw2 fb2 pgood2 mode gnd fsel single alkaline cell 612k 1.21m 1.78m 1m 15pf 15pf v out 1.8v 200ma v out 3.3v 150ma shdn1 shdn2 ltc3527 typical applications 1v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta06b 1v 1.5v 1.5v 1.2v burst fixed 1.2v load current (ma) 40 efficiency (%) 50 70 90 100 0.01 1 10 1000 30 0.1 100 80 60 20 35271 ta06c 1.5v 1.2v 1v burst fixed 1v 1.5v 1.2v
ltc3527/ltc3527-1 20 35271fc 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?exposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ? 0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) package description
ltc3527/ltc3527-1 21 35271fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number c 11/09 changes to typical applications change to operation section changes to applications information section 1, 15, 16, 17, 18, 19 12 14 (revision history begins at rev c)
ltc3527/ltc3527-1 22 35271fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 1109 rev c ? printed in usa related parts part number description comments ltc3400/ ltc3400b 600ma i sw , 1.2mhz synchronous step-up dc/dc converters 92% ef? ciency, v in : 0.85v to 5v, v out(max) = 5v, i q = 19a/300a, i sd < 1a, thinsot? package ltc3401 1a i sw , 3mhz synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.5v to 5v, v out(max) = 6v, i q = 38a, i sd < 1a, 10-lead ms package ltc3421 3a i sw , 3mhz synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd < 1a, qfn-24 package ltc3422 1.5a i sw , 3mhz synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 25a, i sd < 1a, 3mm 3mm dfn package ltc3423/ ltc3424 2a i sw , 3mhz synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.5v to 5v, v out(max) = 6v, i q = 38a, i sd < 1a, 10-lead ms package ltc3426 2a i sw , 1.2mhz synchronous step-up dc/dc converter 92% ef? ciency, v in : 1.6v to 4.3v, v out(max) = 5v, i sd < 1a, sot-23 package ltc3428 500ma i sw , 1.25mhz/2.5mhz synchronous step-up dc/dc converter with output disconnect 92% ef? ciency, v in : 1.8v to 5v, v out(max) = 5.25v, i sd < 1a, 2mm 2mm dfn package ltc3429 600ma i sw , 500khz synchronous step-up dc/dc converter with output disconnect and soft-start 96% ef? ciency, v in : 0.5v to 4.4v, v out(max) = 5v, i q = 20a/300a, i sd < 1a, thinsot package ltc3458 1.4a i sw , 1.5mhz synchronous step-up dc/dc converter/ output disconnect/burst mode operation 93% ef? ciency, v in : 1.5v to 6v, v out(max) = 7.5v, i q = 15a, i sd < 1a, dfn-12 package ltc3458l 1.7a i sw , 1.5mhz synchronous step-up dc/dc converter with output disconnect, automatic burst mode operation 94% ef? ciency, v out(max ) = 6v, i q = 12a, dfn-12 package ltc3459 70ma i sw , 10v micropower synchronous boost converter/ output disconnect/burst mode operation v in : 1.5v to 5.5v, v out(max) = 10v, i q = 10a, i sd < 1a, thinsot package ltc3525l-3 500ma i sw , 1.2mhz synchronous step-up dc/dc converters with output disconnect, automatic burst mode operation 94% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.25v, i q = 7a, i sd < 1a, sc70 package ltc3526/ ltc3526b 500ma i sw , 1.2mhz synchronous step-up dc/dc converters with output disconnect, automatic burst mode operation (ltc3526), pwm only (ltc3526b) 94% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.25v, i q = 10a/300a, i sd < 1a, 2mm 2mm dfn package ltc3528/ ltc3528b 1a, 1mhz synchronous step-up dc/dc converter with output disconnect, automatic burst mode operation, pwm only (ltc3528b) 94% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.25v, i q = 10a/300a, i sd < 1a, 2mm 3mm dfn package

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